-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 26 23:30:00 2024 UTC
-- File 20240426_224712_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-26T22:47:15.000.000.000 to 2024-04-26T22:47:15.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240426_224712_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  014C62A0 03EA53F0 021F7A00 0310C700 0298A480 03D4F6C0 023E8DA0 0121CB70 00D89760 035A6E60 027BACA0
      027BACA0 00A33D70 00F2A3C0 008BF220 02CE0B30 03A90EA0 007D89F0 00434D00 0062EB80 00539E40 007A5160
      007A5160 0323BCE0 02593140 0375A9E0 00CF7D10 02A8C390 01FCA250 0302F370 02838AC0 03C24FA0 00236870
      00236870 0032DC40 0215D930 038F9AD0 004857B0 006C7C60 025A4250 01776370 01CCD2C0 012ABBA0 03BFE670
      03BFE670 02601540 03501FE0 027C0800 01A10600 01718500 01C94780 012DE440 01BB1660 03669D50 00D5D3F0
      00D5D3F0 00BF3A00 00E0A700 0090F480 006C4760 032D3260 00BBAB50 02E67EF0 03954180 025FE140 037011E0
      037011E0 00C81910 02AC1590 01FA1F50 030710F0 01424C40 02F1B530 03896FA0 004DD870 006B3440 005EAE60
      005EAE60 0271F950 014905F0 01ED8700 011B4480 0196E6C0 02AECAD0 00FCD7D0 0282BC30 03C3E220 00221330
      00221330 00331AA0 022A97F0 033FDC00 02A03200 03F02B00 02083E80 018610E0 03A28C40 0273CA60 014A2F50
      014A2F50 03EF38F0 0218A480
     
