-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 26 23:27:45 2024 UTC
-- File 20240426_210542_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-26T21:05:45.000.000.000 to 2024-04-26T21:05:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240426_210542_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00690C00 005D8A00 00734F00 004AE880 006F9CC0 005852A0 02747BF0 034E4600 02E96500 01CEEBC0 0294CF10
      0294CF10 02EF5440 03CC7F30 03152050 009FB070 00D06840 00B85C60 02E47250 01964B70 015D6EC0 01F3D9A0
      01F3D9A0 030A3570 028F2FC0 03E45C10 020B3900 030EA580 0289F740 03CD0CE0 002B8A90 023E4FD0 01216830
      01216830 01B1DC20 03693230 02DDAB20 00D9BF50 015AB070 01F7E840 010C1C60 038A1250 004F1B70 006896C0
      006896C0 005CDDA0 0272B370 034BEAC0 02EE1FA0 00CC8830 02556610 017FD510 03C03F90 00202050 02303070
      02303070 03282840 02BC3C60 01E22250 03133370 029AAAC0 03EBFFD0 000F0010 02088010 010CC010 038AA010
      038AA010 004FF010 02680810 015C0C10 03F20A10 000B0F10 020E8890 0284E660 02E34AA0 0192EFF0 015B9800
      015B9800 01F65400 010D7E00 018BC100 014E2180 01E93140 011DA9E0 03937D10 022D61C0 039DE890 00531CD0
      00531CD0 027A92B0 0347DBE0 00E43610 02962D10 01DD3B90 0333A650 00AA7570 00FF4FC0 02407410 02B02700
      02B02700 03E83480 021C2EC0
     
