-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 23:26:00 2024 UTC
-- File 20240425_192629_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-25T19:26:32.000.000.000 to 2024-04-25T19:26:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240425_192629_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0370D2B0 03645DF0 016B3980 00EF52A0 0298FBF0 03D48600 023EC500 0321A780 02B17440 03E9CE60 001D2950
      001D2950 0213BDF0 031A6300 014BA940 02F73EF0 038CA180 024AF140 036F89E0 00D84D10 02B46B90 01EE5E50
      01EE5E50 03197170 0295C9C0 03DF2D20 00185DD0 010A3990 038F2550 0048B7F0 006CEC00 005A9A00 0077D700
      0077D700 004C3C80 006A22C0 005F33A0 0270AA70 01A47FA0 01BB2030 0166B020 03D5E830 023F1C20 01209230
      01209230 01B0DB20 0368B6B0 02DCEDE0 01B29B10 036BD690 026F1EE0 02AC48C0 03FA6CA0 00075AF0 0004F780
      0004F780 00068C40 0005CA60 02072F50 0104B8F0 0186E480 014596C0 02F3AED0 00C53CD0 02A7A2B0 03F473E0
      03F473E0 000E4A10 02096F10 010DD890 038B34D0 004EAEB0 0069F9E0 025D0510 02B9C3C0 03F29110 000BD990
      000BD990 020E3550 01092FF0 018DB800 014B6400 01EED600 0119BD00 01956380 015FD240 02F81DB0 03C209B0
      03C209B0 02230D60 01328BD0 03ABCE30 027E2920 01413DB0 01E1A360 031172D0 0099CBB0 00D52E60 035FDCA0
      035FDCA0 00781970 004415C0
     
