-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 23:16:54 2024 UTC
-- File 20240425_125724_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-25T12:57:27.000.000.000 to 2024-04-25T12:57:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240425_125724_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03780650 006202B0 005303E0 027A8210 0147C310 03E42290 001633D0 021D2A30 0313BF20 009A60B0 00D750E0
      00D750E0 035E7C40 0378A130 02C4F1A0 01A68970 0175CDC0 01CF2B20 0328BEB0 02BCE1E0 01E29110 0313D990
      0313D990 009A3550 016B97F0 00EF2E00 0098B900 00D4E580 00BE9740 00E1DCE0 02913290 01D9ABD0 03357E30
      03357E30 02AFC120 01F821B0 028218B0 03E18A70 02114F40 0319E8E0 00951C90 02DF92D0 01B05BB0 01687660
      01687660 03DC4D50 00326BF0 002B5E00 001F7880 00086260 020C5350 010A7AF0 018F4780 0148E440 01EC9660
      01EC9660 031ADD50 0097B3F0 00DC6A00 00B25F00 0075B840 0227B230 03346B20 00AE5EB0 00F971E0 0285C910
      0285C910 01C72D90 0324BB50 00B6E6F0 00ED9580 009B5F40 026B7870 01AF6220 0378D330 02C4BAA0 01A6E7F0
      01A6E7F0 01759400 01CF5E00 0128F100 01BC8980 0162CD40 01D3ABE0 039D3F00 0129D040 01BD3860 0363A450
      0363A450 00D27670 00BB4D40 00E6EBE0 02959E10 01DF5110 0330F990 00A88550 017E63F0 00E0A900 0090FD80
      0090FD80 00D88340 00B4C2E0
     
