-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 23:10:33 2024 UTC
-- File 20240425_082647_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-25T08:26:50.000.000.000 to 2024-04-25T08:26:50.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240425_082647_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00D8BF70 00B4E0C0 00EE90A0 0299D8F0 03D53480 011FD760 03C81E60 021608A0 008E8670 00C9C540 00AD27E0
      00AD27E0 02FBB410 01866E10 03455910 00E7F590 02940F50 01DE08F0 01310C80 00D4C560 035F53E0 00F0FA10
      00F0FA10 02888710 01CCC490 032AA6D0 00BFF5B0 00E00F60 029008D0 01D80CB0 01340AE0 03D707C0 031E4210
      031E4210 00916310 02D9D290 01B53BD0 036FA630 02D87520 01B44FB0 016E6860 03D95C50 0035F270 001785A0
      001785A0 010E23B0 01893260 034DAB50 00EB7EF0 009EC180 00D1A140 00B971E0 02E5C910 01972D90 035CBB50
      035CBB50 00797370 0022E560 023397D0 012A5C30 01BF7220 0360CB30 02D0AEA0 01B8F9F0 01648500 01D6C780
      01D6C780 013DA440 02D1BB30 03DCB350 0032EAF0 002B9F80 003E5040 00217860 0231C450 01292670 01BDB540
      01BDB540 01636FE0 03D2D810 021DDA00 01899B80 014D5640 01EBFD60 031E03D0 00910230 00D98320 02B542B0
      02B542B0 03EFE3E0 00181210 02141B10 028F0B40 03E44770 021664C0 031D56A0 0093FDF0 00DA0300 00B70280
      00B70280 00EC83C0 009AC220
     
