-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 01:10:06 2024 UTC
-- File 20240424_201928_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-24T20:19:31.000.000.000 to 2024-04-24T20:19:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240424_201928_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00BB8BE0 02E64E10 01956910 035FDD90 00F03350 02882AF0 03CC3F80 022A2040 039F9830 03282A10 025E1F80
      025E1F80 01B88820 01B26610 036B5510 00DEFF90 02B18050 01E94070 011DE040 01931060 035A9850 00F7D470
      00F7D470 008C3E40 026510B0 03ABCC70 027E2A40 03413F60 00E1A0D0 029170B0 03D9C8E0 00352C90 022FBAD0
      022FBAD0 013867B0 01A45460 03BB3F20 00335050 022AF870 033F8440 02A04660 01F06550 030857F0 028C7C00
      028C7C00 03CA4200 022F6300 0338D280 01525DE0 03FDB980 02036540 0302D7E0 0083BC10 02C26210 01A35310
      01A35310 0372FA90 00CB87D0 02AE4430 03F96620 0002EA90 0301CFE0 00812810 02C1BC10 01A16210 0371D310
      0371D310 00C93A90 02ADA7D0 01FB7430 0106CE20 0385A930 0323BED0 005930D0 0275A8B0 034F7CE0 00E8C290
      00E8C290 029CA3D0 01D2F230 013B8B20 03A64EB0 027569E0 014FDD10 03F419C0 03070A90 00848FD0 02C6C830
      02C6C830 03A5AC20 00777A30 004CC720 026AA4B0 035FF6E0 00F00D90 02880B50 00E60770 004A8260 026FC350
      026FC350 015822F0 01F43380
     
