-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 00:51:05 2024 UTC
-- File 20240424_073822_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-24T07:38:25.000.000.000 to 2024-04-24T07:38:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240424_073822_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02EDF2B0 039B0BE0 00568E10 027DC910 02A196C0 03F8AED0 00027CD0 0101A150 01C0B8F0 0120E480 01B096C0
      01B096C0 0168DDA0 03DCB370 0232EAC0 032B9FA0 00BE5070 00E17840 0091C460 036C9320 006D6D50 025BDBF0
      025BDBF0 03763600 02CD2D00 03ABBB80 027E6640 03415560 00E1FFD0 02910030 03D98020 001AA010 030BF800
      030BF800 028E0400 03C90600 022D8500 033B4780 02A6E440 03F59660 000F5D50 0208F3F0 030C8A00 01456780
      01456780 00F3EA20 028A1F30 03CF10A0 002898F0 003CD480 0022BEC0 0033E1A0 022A1170 033F19C0 02A09520
      02A09520 00F86FD0 01422C10 03E33A10 0012A710 021BF490 01160ED0 039D09B0 02538D60 017A4BD0 03C76E30
      03C76E30 0224D920 009B5AD0 016B7BD0 03DEC630 0231A520 012977B0 01BDCC60 03632A50 00D2BF70 00BBE0C0
      00BBE0C0 00E610A0 029518F0 01EFCA40 028C17B0 03CA1C60 002F1250 02389B70 0324D6C0 02B6BDA0 01EDE370
      01EDE370 011B12C0 01969BA0 035DD670 01799EA0 01E2A8F0 0113FC80 019A02C0 015703A0 03FC8270 0202C340
      0202C340 0303A2E0 00827390
     
