-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 00:50:13 2024 UTC
-- File 20240424_070432_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-24T07:04:35.000.000.000 to 2024-04-24T07:04:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240424_070432_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00D2A690 02BBF5D0 01E60F30 011508A0 039F8CF0 02504A80 03786FC0 02C45820 00D33A10 035D5380 02F3FA40
      02F3FA40 038A0760 004F04D0 026886B0 035CC5E0 00F2A710 028BF490 01CE0ED0 032909B0 035EC6B0 0378D2F0
      0378D2F0 02C4BB80 03A6E640 02759560 014F5FD0 03E8F030 021C8820 0112CC30 019BAA20 03567F30 037EA050
      037EA050 0060F830 00508420 0278C630 0344A520 00E6F7B0 00958C60 02DF4A50 01B0EF70 016898C0 01DCD4A0
      01DCD4A0 01995F70 00AAF860 02FF8450 01804670 01406540 01E057E0 03107C10 00984210 02D46310 01BE5290
      01BE5290 03617BD0 0068E310 032E4940 02B96DE0 01E5DB10 03173690 009CADD0 02D2FB30 03BB86A0 006645F0
      006645F0 00556700 007FD480 00201F60 03180860 00940C50 02DE0A70 03B10F40 026988E0 015D4C90 03F3EAD0
      03F3EAD0 000A1FB0 000F1060 02089850 00866A30 0262AF90 0153F850 03FA0470 02070640 03048560 0086C7D0
      0086C7D0 02C5A430 03A77620 0074CD30 004EABA0 0134FF30 02D74050 01BCE070 01629040 01D3D860 033A3450
      033A3450 00A72E70 00F4B940
     
