-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 00:48:55 2024 UTC
-- File 20240424_061347_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-24T06:13:50.000.000.000 to 2024-04-24T06:13:50.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240424_061347_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  010A5350 038F7AF0 0248C780 01B65220 01B6BD90 036DE350 00DB12F0 00B69B80 00EDD640 009B3D60 02D6A3D0
      02D6A3D0 01BDF230 01630B20 03D28EB0 031DE4F0 01498B40 01ED4EE0 031BE990 00961D50 02DD13F0 03B39A00
      03B39A00 026A5700 035F7C80 02F0C2C0 0388A3A0 00267930 021AA2D0 0117F3B0 019C0A60 03520F50 00FB08F0
      00FB08F0 00868C80 00C5CAC0 00A72FA0 02F4B870 038EE440 0324CB30 035B5750 00F6FCF0 008D8280 00CB43C0
      00CB43C0 00AEE220 02F99330 03855AA0 0047F7F0 00640C00 00560A00 003E8780 0010E220 02189330 0314DAA0
      0314DAA0 009EB7F0 00D1EC00 00B91A00 00E59700 00975C80 00DCF2C0 00B28BA0 0175E730 02E78A50 01944F70
      01944F70 015E68C0 01F15CA0 0309F2F0 028D0B80 03CB8E40 022E4960 01396DD0 03A5DB30 033B9B50 00532B70
      00532B70 007ABEC0 0047E1A0 02641170 035619C0 02FD1520 01839FB0 01425060 03E37850 0012C470 000DD320
      000DD320 01059D50 038753F0 0244FA00 03668700 02D5C480 03BF26C0 0260B5A0 0150EF70 01F898C0 0104D4A0
      0104D4A0 01C35F70 00917860
     
