-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 00:20:46 2024 UTC
-- File 20240423_110333_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-23T11:03:36.000.000.000 to 2024-04-23T11:03:36.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240423_110333_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03B8A880 0264FCC0 035682A0 00FDC3F0 00832200 00C2B300 00A3EA80 00F21FC0 008B1020 02CE9830 03A9D420
      03A9D420 007D3E30 0043A120 026271B0 03534960 027D76E0 02A1E6C0 03F115A0 00099F70 000D50C0 000BF8A0
      000BF8A0 020E04F0 03090680 028D85C0 03CB4720 002EE4B0 021CCB70 01895760 034DFCD0 00EB02B0 009E83E0
      009E83E0 02D1C210 01B92310 0365B290 00D76BD0 02BCDE30 03E2B120 0009F4D0 01068750 0385C4F0 02472680
      02472680 0364B5C0 02D6EF20 01BD98B0 016354E0 03D2FE90 003B81D0 02264130 039AB0D0 002BF450 023E0E70
      023E0E70 03210940 02B18DE0 01E94B10 031DEE90 009319D0 02DA9530 03B7DFA0 006C3070 002D1420 011DCF10
      011DCF10 03932890 005ABCD0 0277E2B0 034C13E0 00EA1A10 029F1710 01D09C90 0338D2D0 00A4BBB0 027B7330
      027B7330 03A36550 0072D7F0 004BBC00 006E6200 00595300 0075FA80 004F07C0 00688420 025CC630 0372A520
      0372A520 0065FBD0 012B8310 03BE4290 006163D0 0251D230 03793B20 00C5A6B0 00A775E0 02F4CF10 018EA890
      018EA890 0349FCD0 00768150
     
