-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 00:09:51 2024 UTC
-- File 20240423_034343_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-23T03:43:46.000.000.000 to 2024-04-23T03:43:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240423_034343_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  035CC2B0 02F2A3E0 018BF210 034E0B10 02748740 03A76270 013A69A0 01D3AEB0 029D3CF0 03D3A280 023A73C0
      023A73C0 03274A20 00B4EF30 00EE98A0 0299D4F0 03D53E80 023FA1C0 03207120 005824D0 013A1B50 03A716F0
      03A716F0 02749D80 034ED340 02E9BAE0 019D6790 0353D450 00FA3E70 00872140 00C4B1E0 03537480 017D6760
      017D6760 03C3D4D0 00223EB0 003321E0 022AB110 013FE990 03A01D50 007013F0 00481A00 006C1700 002D0E40
      002D0E40 021DC4B0 031326E0 009AB590 02D7EF50 01BC18F0 01621480 01D31EC0 013A91A0 03A7D970 027435C0
      027435C0 03A71790 023A4E20 01276930 01B4DDA0 036EB370 02D9EAC0 03B51FA0 006F9070 00585840 00747460
      00747460 024E4E50 00B4B4B0 02777770 034CCCC0 02EAAAA0 019FFFF0 01500000 01F80000 01040000 01860000
      01860000 01450000 01E78000 008A2000 00679800 00545400 007E7E00 00414100 0061E180 00511140 007999E0
      007999E0 02455510 0167FF90 03D40050 001F0030 02084010 010C6010 038A5010 004F7810 0268C410 015CA610
      015CA610 03F2F510 000B8F90
     
