-- OK --
-----------------> BLESK ver.2021-02-27 run on Thu Apr 25 00:07:21 2024 UTC
-- File 20240423_020213_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-23T02:02:16.000.000.000 to 2024-04-23T02:02:16.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240423_020213_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03D8A0D0 0034F0B0 002E88E0 0239CC90 01252AD0 03B7BFB0 026C6060 02AD2820 00FDDE10 02833110 01C2A990
      01C2A990 0323FD50 00B203F0 00EB0200 009E8300 00D1C280 00B923C0 00E5B220 014BB590 03F737A0 000CAC70
      000CAC70 000AFA40 000F8760 020844D0 010C66B0 018A55E0 034F7F10 00E8C090 029CA0D0 00E97850 014EE230
      014EE230 01E99320 031D5AB0 0293F7E0 01DA0C10 03370A10 00AC8F10 02FAC890 0187ACD0 03447AB0 037323F0
      037323F0 01655900 01D7F580 013C0F40 01A208E0 03730C90 00CA8AD0 02AFCFB0 03F82860 00043C50 02062270
      02062270 018299A0 01A1EAB0 01711FE0 03C99010 002D5810 023BF410 01260E10 03B50910 006F8D90 02584B50
      02584B50 01746EF0 00E72CC0 024A5D50 016F73F0 01D8CA00 0134AF00 01AEF880 017984C0 01C546A0 0327E5F0
      0327E5F0 02B41700 03EE1C80 010C8960 03C566E0 0027D590 02343F50 012E20F0 01B93080 0165A8C0 01D77CA0
      01D77CA0 033CC2F0 02A2A380 03F3F240 030505B0 0343C3B0 02E22260 01933350 035AAAF0 02F7FF80 038C0040
      038C0040 024A0060 016F0050
     
