-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 23:29:34 2024 UTC
-- File 20240421_233232_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-21T23:32:35.000.000.000 to 2024-04-21T23:32:35.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240421_233232_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  018A1CF0 00A78940 027A26F0 01A39AC0 017257A0 03CB7C70 022EC240 0339A360 00A572D0 02F7CBB0 038C2E60
      038C2E60 004A3950 026F25F0 01AC5B80 00BD3B20 02E3A6B0 039275E0 005B4F10 0276E890 014D9CD0 03EB52B0
      03EB52B0 021EFBE0 01118610 03994510 022AF3C0 039FC510 00502790 02783450 01442E70 01E63940 011525E0
      011525E0 039FB710 00506C90 02785AD0 014477B0 02F32630 03C55A90 0027F7D0 02340C30 032E0A20 00B90F30
      00B90F30 00E588A0 02974CF0 03DCEA80 02329FC0 032BD020 005F1C10 03384900 02A46D80 03F65B40 020D76E0
      020D76E0 010BCD90 038E2B50 00493EF0 006DA180 005B7140 0076C9E0 0326D680 015ADEE0 03F7B190 000C6950
      000C6950 020A5DF0 030F7300 0288CA80 03CCAFC0 022AF820 013F8430 01A04620 01B83290 03B215E0 006B1F10
      006B1F10 025E9090 0171D8D0 03C934B0 022DAEE0 013B7990 03A6C550 0075A7F0 004F7400 00346700 00172A40
      00172A40 001CBF60 0212E0D0 011B90B0 019658E0 035D7490 00F3CED0 028A29B0 03CF3D60 0028A3D0 011E7910
      011E7910 03C8A2C0 022CF3A0
     
