-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 23:28:59 2024 UTC
-- File 20240421_224157_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-21T22:42:00.000.000.000 to 2024-04-21T22:42:00.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240421_224157_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  035D3340 02F3AAE0 018A7F90 034F4050 00E8E070 009C9040 00D2D860 02BBB450 01E66E70 01155940 019FF5E0
      019FF5E0 03500F10 00F80890 02840CD0 01C60AB0 01250FE0 03B78810 02362600 032D3500 02BBAF80 03E67840
      03E67840 02154460 011FE650 03901570 02581FC0 03741020 00CE1830 02548A10 02BF6780 03E0D440 0210BE60
      0210BE60 0118E150 039491F0 025ED900 0371B580 02C96F40 03ADD8E0 007B3490 03235760 02597E60 0175C150
      0175C150 03CF21F0 0228B100 033CE980 02A29D40 03F3D3E0 000A3A10 020F2710 0108B490 03C67760 0212A660
      0212A660 011BF550 03960FF0 025D0800 03738C00 02CA4A00 03AF6F00 0278D880 0344B4C0 02E6EEA0 00CACCF0
      00CACCF0 0057D540 007C3FE0 02422010 01633010 03D2A810 003BFC10 02260210 01350310 03AF8290 007843D0
      007843D0 01223110 03D994C0 02355EA0 012FF1F0 01B80900 01640D80 01D60B40 013D0EE0 03A38990 00724D50
      00724D50 024B6BF0 01B76F00 00B66C40 00ED5A60 029BF750 01D60CF0 013D0A80 01A38FC0 01724820 03CB6C30
      03CB6C30 022EDA20 0139B730
     
