-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 23:28:34 2024 UTC
-- File 20240421_222502_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-21T22:25:05.000.000.000 to 2024-04-21T22:25:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240421_222502_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02F2EA60 02C5CFA0 01A72870 0174BC40 01CEE260 03299350 00BD5AF0 00E3F780 00920C40 00DB0A60 02B68F50
      02B68F50 00F6E470 0046CB20 0265AEB0 035779E0 00FCC510 0282A790 01C3F450 03220E70 02B30940 03EA8DE0
      03EA8DE0 001FCB10 03081740 03460E70 02E50940 03978DE0 005C4B10 02726E90 014B59D0 03EEF530 02198FA0
      02198FA0 01154870 019FEC40 02A80D30 03FE05D0 00010730 000184A0 020146F0 0301E580 02811740 03C19CE0
      03C19CE0 00215290 0231FBD0 01290630 02DEC290 02D8D1E0 01B4B910 036EE590 00D99750 02B55CF0 03EFF280
      03EFF280 02180BC0 03140E20 009E0930 00D10DA0 015CC5B0 02F953B0 0385FA60 00470750 026484F0 0356C680
      0356C680 02FDA5C0 03837720 0042CCB0 0063AAE0 02527F90 02BDA020 00F1B810 02896410 01CDD610 032B3D10
      032B3D10 00BEA390 02E1F250 01910B70 01598EC0 01F549A0 030FED70 01440DE0 03F30580 020A8740 030FC4E0
      030FC4E0 00882690 02CC35D0 01AA2F30 017F38A0 03C0A4F0 0220F680 03308DC0 03546590 027F2BA0 0140BE70
      0140BE70 01E0E140 011091E0
     
