-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 23:28:09 2024 UTC
-- File 20240421_220807_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-21T22:08:10.000.000.000 to 2024-04-21T22:08:10.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240421_220807_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00954DD0 02DFEB30 03B01EA0 006811F0 005C1900 00721580 00258FA0 011BA430 01967620 035D4D30 02F3EBA0
      02F3EBA0 018A1E70 014F1140 01E899E0 031CD510 0092BF90 02DBE050 00DB0830 025B4610 0176E510 03CD9790
      03CD9790 002B5C50 023EF270 03218B40 02B14EE0 01E9E990 031D1D50 009393F0 006D2D00 002DDDC0 003B3320
      003B3320 0226AAB0 0335FFE0 00AF0010 02F88010 0184C010 0346A010 00E5F010 02970810 02EE4600 01CCB280
      01CCB280 012AEBC0 01BF9E20 03605130 02D079A0 01B84570 016467C0 01D65420 033D7E30 02A3C120 00F910D0
      00F910D0 0142CC50 03E3AA70 02127F40 031B40E0 0096E090 02DD90D0 01B358B0 016AF4E0 03DF8E90 003049D0
      003049D0 01143690 03CF16E0 00289D90 023CD350 0122BAF0 01B3E780 016A1440 01DF1E60 03309150 00A8D9F0
      00A8D9F0 00FCB500 004177C0 0230E610 01289510 03BCDF90 0062B050 0253E870 037A1C40 02C71260 01A49B50
      01A49B50 0376D6F0 02CDBD80 01D5B1A0 019FB4B0 01506EE0 03F85990 00047550 02064FF0 03056800 0287DC00
      0287DC00 03C43200 02262B00
     
