-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 23:25:09 2024 UTC
-- File 20240421_200942_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-21T20:09:45.000.000.000 to 2024-04-21T20:09:45.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240421_200942_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  005BCC10 02762A10 02A69F80 01FAE820 03079C30 02845220 01C67B30 012546A0 03B7E5F0 026C1700 035A1C80
      035A1C80 02F712C0 038C9BA0 00256B30 021BEF50 011618F0 019D1480 01539EC0 01FA51A0 03077970 0284C5C0
      0284C5C0 03C6A720 0025F4B0 00370EE0 031644C0 034EB350 00E9EAF0 009D1F80 00D39040 00BA5860 02E77450
      02E77450 0194CE70 015EA940 01F1FDE0 03090310 0246C140 03B2D0F0 026BB880 035E64C0 02F156A0 0189FDF0
      0189FDF0 014D0300 01EB8280 011E43C0 01916220 0359D330 037A9D50 0063E9F0 00521D00 007B1380 00469A40
      00469A40 0065D760 02573CD0 017CA2B0 01C2F3E0 03238A10 00B24F10 0375B440 0367B730 02D46CA0 01BE5AF0
      01BE5AF0 01617780 01D1CC40 01392A60 03A5BF50 007760F0 004CD080 006AB8C0 022FF250 009C05B0 00D20760
      00D20760 02BB04D0 01E686B0 0115C5E0 039F2710 0050B490 0278EED0 014499B0 01E6D560 038ADFE0 0227D800
      0227D800 03343400 02AE2E00 03F93900 0205A580 03077740 0284CCE0 01C6AA90 0325FFD0 00B70030 02764010
      02764010 02A6B000 03F5E800
     
