-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 23:14:49 2024 UTC
-- File 20240421_125002_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-21T12:50:05.000.000.000 to 2024-04-21T12:50:05.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240421_125002_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02A5A290 01F773D0 01866510 03A2ABC0 0339FF10 00A50090 02F780D0 018C40B0 014A60E0 03EF5090 0018F8D0
      0018F8D0 021484B0 031EC6E0 0091A590 036CBBA0 006D7330 005BCAA0 02762FF0 034D3800 02EBA400 039E7600
      039E7600 02514D00 0379EB80 02C51E40 03A79160 023A2CE0 02939D40 03DA53E0 00377A10 022CC710 013AA490
      013AA490 03A7F6D0 00740DB0 004E0B60 02690ED0 015D89B0 02F9A6B0 03C2BAF0 0223E780 03321440 02AB1E60
      02AB1E60 01FE9150 0301D9F0 02813500 03C1AF80 02217840 0331C460 02549320 00BF6D50 02E0DBF0 0390B600
      0390B600 0258ED00 03749B80 02CED640 03A9BD60 007D63D0 0243D230 03623B20 00699350 012EAD70 01B9FBC0
      01B9FBC0 01650620 03D78530 023C47A0 01226470 01B35640 016AFD60 03DF83D0 00304230 02143190 028F14A0
      028F14A0 01C89EF0 012CD180 01BAB940 0167E5E0 03D41710 003E1C90 022112D0 01319BB0 01A95660 03BEFEA0
      03BEFEA0 0030C0F0 0028A080 003CF0C0 002288A0 0233CCF0 032A2A80 02BF3FC0 03E0A020 0010F030 00188820
      00188820 010A6610 03C7AA80
     
