-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 23:10:57 2024 UTC
-- File 20240421_101747_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-21T10:17:50.000.000.000 to 2024-04-21T10:17:50.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240421_101747_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  025180C0 037940A0 00C5E0F0 00A71080 00F498C0 008ED4A0 02C9BEF0 01D6B0C0 029EF450 00E8C730 024E5250
      024E5250 01697B70 01DDC6C0 013325A0 03AAB770 027FECC0 03401AA0 00E017F0 00901C00 00D81200 005A0D80
      005A0D80 003B85A0 02264770 033564C0 02AFD6A0 01F83DF0 01042300 01863280 01452BC0 01E7BE20 03146130
      03146130 034F28D0 00745E50 024E7170 036949C0 02DDED20 01B31BB0 016A9660 03DFDD50 003033F0 00282A00
      00282A00 003C3F00 00111040 020CCC30 030AAA20 008FFF30 00C800A0 02AC00F0 03FA0080 020700C0 030480A0
      030480A0 0086C0F0 00C5A080 0053B860 033D3220 00A3AB30 00F27EA0 028B41F0 03CEE100 02299180 033D5940
      033D5940 02A3F5E0 01F20F10 030B0890 02474660 02B272A0 01EB4BF0 011EEE00 01919900 01595580 01F5FF40
      01F5FF40 010F00E0 03888090 004CC0D0 026AA0B0 03AFF870 013C0220 03A20330 027302A0 014A83F0 01EFC200
      01EFC200 01182300 01943280 015E2BC0 01F13E20 0309A130 0346B8D0 0072F250 024B8B70 036E4EC0 02D969A0
      02D969A0 01B5DD70 016F33C0
     
