-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 22:23:08 2024 UTC
-- File 20240420_042519_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-20T04:25:22.000.000.000 to 2024-04-20T04:25:22.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240420_042519_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0295B7E0 01DF6C10 0330DA10 00A8B710 02FCEC90 01829AD0 0343D7B0 02E23C60 01932250 035AB370 02F7EAC0
      02F7EAC0 038C1FA0 004A1070 006F1840 00589460 033A6F20 00A758B0 00F4F4E0 028E8E90 01C9C9D0 032D2D30
      032D2D30 02BBBBA0 01E66670 01155540 019FFFE0 03A80000 013E0000 01A10000 01718000 01C94000 012DE000
      012DE000 01BB1000 01669800 01D5D400 013F3E00 01A0A100 00B878C0 02722250 014B3370 01EEAAC0 0119FFA0
      0119FFA0 03950070 025F8040 03704060 00C86050 02AC5070 03FA7840 0303A230 03413990 00E1A550 029177F0
      029177F0 03D9CC00 02352A00 032FBF00 02B86080 03E450C0 021678A0 011D44F0 00C9F340 02568570 037DC7C0
      037DC7C0 02C32420 01A2B630 0173ED20 03CA1BB0 022F1660 01389D50 03A4D3F0 0276BA00 01A6F380 00BAC520
      00BAC520 02E7A7B0 03947460 005E4E50 02716970 0349DDC0 02ED3320 019BAAB0 01567FE0 03FD4010 0201F000
      0201F000 01808400 0140C600 01E0A500 0110F780 01988C40 0154CA60 03FEAF50 0001F8F0 00010480 000186C0
      000186C0 0200A2D0 008079D0
     
