-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 22:22:39 2024 UTC
-- File 20240420_040824_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-20T04:08:27.000.000.000 to 2024-04-20T04:08:27.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240420_040824_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01990DE0 03AAC580 013FD3A0 03A03A70 02702740 034834E0 00EC2E90 029A39D0 01D72530 013CB7A0 03A2EC70
      03A2EC70 02739A40 03A52BB0 033BDF30 02A630A0 01F528F0 010FBC80 018862C0 014C53A0 03EA7A70 021F4740
      021F4740 0310E4E0 00989690 036A6EE0 026FACC0 03587AA0 00F447F0 008E6400 00C95600 00ADFD00 00FB0380
      00FB0380 00868240 00C5C360 02A722D0 00FA59D0 0143BA90 03E267D0 00135430 001AFE20 02178130 031C41A0
      031C41A0 00926170 00DB51C0 00B6F920 02ED85B0 03CDA3B0 0315B930 029F65A0 01D0D770 0138BCC0 01A4E2A0
      01A4E2A0 037693F0 02CDDA00 03AB3700 027EAC80 0341FAC0 037083D0 00646110 02565190 017D7950 03C3C5F0
      03C3C5F0 02222700 03333480 02AAAEC0 03FFF9A0 00000570 000007C0 02000210 02800180 03C00140 022001E0
      022001E0 01300110 03A80190 007C0150 024201F0 03630100 02D28180 03BBC140 033310F0 01554C40 01FFEA60
      01FFEA60 03001F50 008010F0 00C01880 00A014C0 00F01EA0 028811F0 03CC1900 022A1580 019F8FA0 01A82430
      01A82430 017C3620 03C22D30
     
