-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 22:20:03 2024 UTC
-- File 20240420_022658_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-20T02:27:01.000.000.000 to 2024-04-20T02:27:01.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240420_022658_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01B0DAD0 0368B7B0 02DCEC60 01B29A50 036BD770 02DE3CC0 03B122A0 0069B3F0 005D6A00 0073DF00 004A3080
      004A3080 006F28C0 0058BCA0 0274E2F0 01A749C0 02BA7690 01E74DD0 0314EB30 029E9EA0 01D1D1F0 01393900
      01393900 01A5A580 01777740 01CCCCE0 032AAA90 025FFFE0 02B80000 03E40000 02160000 031D0000 02938000
      02938000 03DA4000 02376000 032CD000 02BAB800 03E7E400 010A0B00 00C78740 00A444E0 02F66690 018D55D0
      018D55D0 034BFF30 02EE00A0 019900F0 01558080 01FF40C0 0100E0A0 01C04870 00903620 02D82D30 03B43BA0
      03B43BA0 006E2670 00593540 0075AFE0 024F7810 0168C410 03DCA610 0032F510 0315C7C0 034F9210 00E85B10
      00E85B10 029C7690 01D24DD0 033B6B30 02A6DEA0 01F5B1F0 010F6900 0188DD80 014CB340 02F57570 01C7E7E0
      01C7E7E0 03241410 00B61E10 02ED1110 019B9990 03565550 00FD7FF0 0083C000 00C22000 00A33000 00795400
      00795400 0022FF00 00338080 002A40C0 003F60A0 0220D0F0 0330B880 02A8E4C0 03FC96A0 0002DDF0 0003B300
      0003B300 00013540 0200D7F0
     
