-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 22:08:31 2024 UTC
-- File 20240419_190722_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-19T19:07:25.000.000.000 to 2024-04-19T19:07:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240419_190722_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02C536D0 01A7ADB0 01747B60 03CE46D0 002965B0 003DD760 02233CD0 0132A2B0 01ABF3E0 037E0A10 00C10F10
      00C10F10 02A18890 01F14CD0 0309EAB0 028D1FE0 02E5C800 03972C00 025CBA00 0372E700 02CB9480 03AE5EC0
      03AE5EC0 027971A0 0145C970 01E72DC0 0114BB20 01CF7350 01946570 015E57C0 01F17C20 0309C230 028D2320
      028D2320 01CBB2B0 012E6BE0 03B95E10 0065F110 02570990 02BE46A0 00F0B2F0 0088EB80 00CC9E40 00AAD160
      00AAD160 02FFB9D0 01806530 014057A0 03E07C70 02104240 03186360 024A2960 02B79EE0 01EC5190 031A7950
      031A7950 009745F0 00DCE700 00B29480 00EBDEC0 009E31A0 02D12970 03B9BDC0 0332B190 0255F4A0 017F0EF0
      017F0EF0 01C08980 0120CD40 01B0ABE0 0368FE10 00DC8110 02B2C190 01EBA150 031E71F0 0148A480 00F67B60
      00F67B60 028D46D0 01CBE5B0 012E1760 03B91CD0 006592B0 00575BE0 027CF610 01428D10 03E3CB90 02091720
      02091720 0086CE50 02C5A970 03A77DC0 0274C320 014EA2B0 01E9F3E0 031D0A10 00938F10 02DA4890 01B76CD0
      01B76CD0 01B66D50 01B6ADF0
     
