-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 22:01:33 2024 UTC
-- File 20240419_145346_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-19T14:53:49.000.000.000 to 2024-04-19T14:53:49.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240419_145346_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0193CCC0 015A2AA0 03F73FF0 020CA000 030AF000 028F8800 03C84C00 022C6A00 033A5F00 02A77080 03F4C8C0
      03F4C8C0 020EACA0 0109FAF0 018D0780 014B8440 01EE4660 03196550 004AEBF0 0037CF00 002C2880 003A3CC0
      003A3CC0 002722A0 0234B3F0 032EEA00 02B99F00 03E55080 0217F8C0 031C04A0 00490370 0036C160 022DA1D0
      022DA1D0 013B7130 01A6C9A0 0375AD70 02CF7BC0 03A8C620 007CA530 0042F7A0 02638C70 01A92520 01BEDBD0
      01BEDBD0 0361B630 02D16D20 01B9DBB0 01653660 03D7AD50 003C7BF0 00224600 00336500 002AD780 001FDE20
      001FDE20 01081890 038C14D0 004A1EB0 006F11E0 02589910 0174D590 03CEBF50 0029E0F0 003D1080 002398C0
      002398C0 02192A50 008ADFB0 00CFB060 02A86850 01FC5C70 01027240 01834B60 0342EED0 00E399B0 00925560
      00925560 02DB7FD0 00DB6010 035B6800 02F6DC00 038DB200 024B6B00 036EDE80 02D9B1C0 03B56920 006FDDB0
      006FDDB0 00583360 02742AD0 00A71FD0 017A4810 03C76C10 0024DA10 0236B710 012DEC90 03BB1AD0 006697B0
      006697B0 0055DC60 027F3250
     
