-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 21:39:56 2024 UTC
-- File 20240419_022930_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-19T02:29:33.000.000.000 to 2024-04-19T02:29:33.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240419_022930_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0228D5A0 013CBF70 00D17060 035CE420 00F29630 008BDD20 02CE33B0 03A92A60 007DBF50 024360F0 0362D080
      0362D080 02D3B8C0 03BA64A0 0033AB70 00153F60 021FA0D0 011070B0 019848E0 03546C90 00FE5AD0 028177B0
      028177B0 03C1CC60 00212A50 0231BF70 0194B060 03AF7420 0078CE30 0044A920 0266FDB0 03558360 00FF42D0
      00FF42D0 0280E3B0 03C09260 0020DB50 0230B6F0 019476C0 02AF26D0 01F8B5B0 0104EF60 038698D0 0045D4B0
      0045D4B0 00673EE0 0254A190 017EF150 03C189F0 02214D00 0198F5C0 02AA4790 01FF6450 0300D670 0280BD40
      0280BD40 03C0E3E0 00209210 0230DB10 0128B690 03BCEDD0 00629B30 0229EB50 009E8F70 00D1C8C0 00B92CA0
      00B92CA0 02E5BAF0 03976780 025CD440 0372BE60 00CBE150 02AE11F0 03F91900 0102CAC0 02C1D7D0 01A13C30
      01A13C30 0171A220 03C97330 022DCAA0 013B2FF0 01A6B800 0175E400 01CF1600 01289D00 00DE69C0 0258AE90
      0258AE90 0174F9D0 03CE8530 0229C7A0 013D2470 01A3B640 01726D60 03CB5BD0 002EF630 00398D20 0112A5D0
      0112A5D0 01CDFB90 032B0650
     
