-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 21:30:17 2024 UTC
-- File 20240418_203422_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-18T20:34:25.000.000.000 to 2024-04-18T20:34:25.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240418_203422_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03FCC110 0002A190 0203F150 008104F0 0060C340 0050A2E0 0278F390 01448A50 03E6CF70 0215A8C0 031F7CA0
      031F7CA0 0090C2F0 00D8A380 00B4F240 027745B0 03A673B0 02754A60 014FEF50 03E818F0 021C1480 03121EC0
      03121EC0 029B11A0 01D69970 013DD5C0 01A33F20 01B95050 01B2FC30 016B8220 03DE4330 023162A0 0129D3F0
      0129D3F0 01BD3A00 0163A700 01D27480 013B4EC0 01A6E9A0 01BACEB0 02B3D4F0 03EA3E80 021F21C0 0310B120
      0310B120 0098E9B0 00D49D60 02BED3D0 01E1BA30 01116720 0399D4B0 032A9F70 015FE860 03F01C50 00081270
      00081270 000C1B40 000A16E0 020F1D90 01089350 038CDAF0 024AB780 036FEC40 036C0D30 036D05D0 00DB8730
      00DB8730 00B644A0 02ED66F0 039BD580 02563F40 037D20E0 00C3B090 02A268D0 01F35CB0 02857970 01E3E2E0
      01E3E2E0 03121390 009B1A50 02D69770 03BDDCC0 026332A0 0152ABF0 01FBFE00 01060100 01850180 00A3C0A0
      00A3C0A0 01791070 01C59840 01275460 03B4FE50 006E8170 0059C1C0 00752120 024FB1B0 03686960 00DC5DD0
      00DC5DD0 01593990 03FAD2A0
     
