-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 21:23:37 2024 UTC
-- File 20240418_163735_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-18T16:37:38.000.000.000 to 2024-04-18T16:37:38.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240418_163735_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03BABD40 0267E3E0 01541210 03FE1B10 00011690 0300CEE0 0080A990 02C0FD50 01A083F0 0170C200 01C8A300
      01C8A300 012CF280 01BA8BC0 0167CE20 03D42930 031F1ED0 004848D0 026C6CB0 035A5AE0 00F77790 028CCC50
      028CCC50 01CAAA70 012FFF40 01B800E0 03640090 00D600D0 015E8050 01F8E030 01049020 0386D830 0245B420
      0245B420 01676E30 01D4D920 033EB5B0 02A1EF60 01F118D0 030994B0 0346AF70 0172FC60 03CB8250 002E4370
      002E4370 003962C0 0025D3A0 02373A70 032CA740 02BAF4E0 01E78E90 031449D0 004F3690 033456E0 00AE7D90
      00AE7D90 02F94350 0185E2F0 01471380 01E49A40 0116D760 039DBCD0 005362B0 007AD3E0 0323DD00 015919C0
      015919C0 01F59520 030F5FB0 0288F060 01CC8850 032ACC70 02BFAA40 03E07F60 001040D0 021860B0 038A2870
      038A2870 01279E20 03B45130 026E79A0 01594570 01F5E7C0 010F1420 03889E30 024CD120 016AB9B0 01DFE560
      01DFE560 03980BE0 022A0700 033F0480 02A086C0 03F0C5A0 0008A770 000CF4C0 000A8EA0 020FC9F0 03082D00
      03082D00 028C3B80 01E51320
     
