-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 21:09:44 2024 UTC
-- File 20240418_082706_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-18T08:27:09.000.000.000 to 2024-04-18T08:27:09.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240418_082706_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  036FCE80 02D829C0 03B43D20 006E23B0 00593260 0275AB50 014F7EF0 01E8C180 011CA140 0192F1E0 035B8910
      035B8910 00F64D90 028D6B50 01CBDEF0 012E3180 01B92940 0165BDE0 03EBB180 010F34A0 0388AEF0 024CF980
      024CF980 036A8540 02DFC7E0 01B02410 03683610 00DC2D10 02B23B90 01EB2650 018F5AB0 02A47BF0 03F64600
      03F64600 020D6500 030BD780 028E3C40 03C92260 002DB350 023B6AF0 0326DF80 02B5B040 03F7B430 03063710
      03063710 00852C90 02C7BAD0 01A467B0 01765460 03CD7E50 002BC170 003E21C0 00213120 0231A9B0 0394BEB0
      0394BEB0 032F70F0 02B8C880 03E4ACC0 0216FAA0 011D87F0 01934400 015AE600 01F79500 010C5F80 018A7040
      018A7040 02A7A430 03FA3B10 00072690 0204B5D0 0106EF30 018598A0 034754F0 02E4FE80 039681C0 025DC120
      025DC120 017321B0 02E558B0 03CBFA70 022E0740 033904E0 00A58690 02F745D0 018CE730 014A94A0 03EFDEF0
      03EFDEF0 02183180 03142940 034F1EF0 017448C0 01CE6CA0 03295AF0 02BDF780 03E30C40 02128A60 011BCF50
      011BCF50 039628F0 025D3C80
     
