-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 21:03:08 2024 UTC
-- File 20240418_043028_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-18T04:30:31.000.000.000 to 2024-04-18T04:30:31.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240418_043028_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01E6ED80 01159B40 019F56E0 0350FD90 00F88350 0284C2F0 03C6A380 0225F240 039B85B0 032B23B0 035F5930
      035F5930 03787AD0 006223D0 02533230 037AAB20 00C7FEB0 00A401E0 02F60110 018D0190 034B8150 00EE41F0
      00EE41F0 00996100 006AE8C0 022FCE50 01382970 01A43DC0 01762320 03CD32B0 022BABE0 013E7E10 03A14110
      03A14110 0071E190 02491150 00B6CCF0 0076D540 004DBFE0 026B6010 015ED010 03F1B810 00096410 020DD610
      020DD610 010B3D10 038EA390 0049F250 013685B0 02D6E3B0 03BD9260 00635B50 0252F6F0 037B8D80 02C64B40
      02C64B40 03A56EE0 0077D990 024C3550 016A2FF0 00EF9C00 004C2900 006A3D80 005F2340 0070B2E0 0248EB90
      0248EB90 016C9E50 03DAD170 0237B9C0 032C6520 00BA57B0 0273BE30 03A53090 0077A8D0 024C7CB0 036A42E0
      036A42E0 00DF6390 02B0D250 01E8BB70 011CE6C0 019295A0 035BDF70 017B1860 03E34A20 0012EF30 001B98A0
      001B98A0 021654F0 031D7E80 0293C1C0 03DA2120 003731B0 002CA960 023AFDD0 0093C190 036D10A0 00DB98F0
      00DB98F0 00B65480 00ED7EC0
     
