-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 20:56:02 2024 UTC
-- File 20240418_001653_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-18T00:16:56.000.000.000 to 2024-04-18T00:16:56.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240418_001653_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0386C440 0245A660 01677550 03D4CFF0 023EA800 0321FC00 02B10200 03E98300 010EA140 02C4F8F0 03A68480
      03A68480 0275C6C0 034F25A0 00E8B770 009CECC0 00D29AA0 02BBD7F0 03E63C00 02152200 018FD980 00A41AA0
      00A41AA0 02F617F0 038D1C00 024B9200 036E5B00 02D97680 03B5CDC0 026F2B20 0158BEB0 01F4E1E0 03874880
      03874880 01227660 03B34D50 006AEBF0 005F9E00 00705100 00487980 006C4540 005A67E0 02775410 014CFE10
      014CFE10 03F54080 0107F060 03840850 00460C70 00650A40 00578F60 027C48D0 01426CB0 01E35AE0 0312F790
      0312F790 009B8C50 016B2530 02EF5BD0 0198F630 01548D20 03FECBB0 0201AE60 01017950 0381C5F0 02412700
      02412700 0361B480 02D16EC0 03DCECD0 00194D50 0215EBF0 031F1E00 02909100 03D8D980 0234B540 032EEFE0
      032EEFE0 00B99810 02E55410 0197FE10 03AE0080 013C8060 03A2C050 0073A070 004A7040 006F4860 0258EC50
      0258EC50 01749A70 01CED740 0129BCE0 03BD6290 0231E9E0 02948E80 03DEC9C0 0231AD20 01297BB0 01BDC660
      01BDC660 03632550 00D2B7F0
     
