-- OK --
-----------------> BLESK ver.2021-02-27 run on Wed Apr 24 19:54:03 2024 UTC
-- File 20240416_132027_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-16T13:20:30.000.000.000 to 2024-04-16T13:20:30.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240416_132027_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  00A3DDD0 02F23330 038B2AA0 004EBFF0 0034F000 002E8800 0039CC00 00252A00 0037BF00 002C6080 003A50C0
      003A50C0 002778A0 0234C4F0 032EA680 015CFAE0 03F943C0 0205E220 01071330 01849AA0 0346D7F0 02E5BC00
      02E5BC00 03976200 025CD300 0372BA80 02CBE7C0 03D70A10 021E4780 03116440 0299D660 01D53D50 033FA3F0
      033FA3F0 02A07200 03F04B00 02086E80 030C59C0 028A7520 00E7A7D0 014A3A10 03EF2710 0018B490 0214EED0
      0214EED0 011E99B0 0191D560 03593FD0 00F5A030 008F7020 02C8C830 03D65610 021EBE80 0311E1C0 02991120
      02991120 01D599B0 013F5560 03A0FFD0 00708030 0048C020 026CA030 035AF020 007BC410 03231300 02B29A80
      02B29A80 03EBD7C0 021E3C20 01112230 0199B320 03556AB0 02FFDFE0 01803010 03402810 02701E00 01A40880
      01A40880 01760CC0 01CD0AA0 032B8FF0 02BE4800 03E16C00 0211DA00 03193700 0295AC80 03DF7AC0 031863D0
      031863D0 004A2910 026F3D90 0158A350 03F4F2F0 020E8B80 0309CE40 028D2960 01CBBDD0 032E6330 02B952A0
      02B952A0 00F2FDF0 0045C180
     
