-- OK --
-----------------> BLESK ver.2021-02-27 run on Sat Apr 20 00:04:17 2024 UTC
-- File 20240413_203129_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-13T20:31:32.000.000.000 to 2024-04-13T20:31:32.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240413_203129_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  006A18D0 025F14B0 03709EE0 026468C0 03AB2E50 003F5CB0 02107970 018C22E0 034A3390 00EF2A50 0298BF70
      0298BF70 03D4E0C0 023E90A0 0121D8F0 01B13480 0169AEC0 01DD79A0 0199E2B0 02AA89F0 03FFCD00 02002B80
      02002B80 03003E40 02802160 01C031D0 03202930 02B03DA0 01E82370 011C32C0 02C915D0 00D6CF90 02BDA850
      02BDA850 01E37C70 0112C240 019BA360 035672D0 00FD4BB0 0083EE60 02C21950 01A315F0 00B94F80 0072F420
      0072F420 024B8E30 036E4920 00D96DB0 00B5DB60 02EF36D0 0198ADB0 0154FB60 03FE86D0 0001C5B0 020093B0
      020093B0 03806D30 02405BA0 01607670 01D04D40 01386BE0 03A45E10 00767110 024D4990 016BED50 03DE1BF0
      03DE1BF0 01188B00 00CA6740 00AF54E0 02F8FE90 018481D0 0346C130 02E5A1A0 01977170 015CC9C0 01F2AD20
      01F2AD20 030BFBB0 03470330 03724150 00CB61F0 00AED100 00F9B980 00856540 00C7D7E0 02A43C10 01F62210
      01F62210 030D3310 008BAA90 03673FE0 026A5000 035F7800 02F0C400 0388A600 024CF500 036A8F80 02DFC840
      02DFC840 03B02C60 00683A50
     
