-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 23:43:05 2024 UTC
-- File 20240413_050116_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-13T05:01:19.000.000.000 to 2024-04-13T05:01:19.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240413_050116_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0032C360 022BA2D0 013E73B0 01A14A60 0371EF50 00C918F0 00AD9480 00FB5EC0 0086F1A0 02C58970 01D3A6E0
      01D3A6E0 033A7590 00A74F50 02F4E8F0 038E9C80 0249D2C0 036D3BA0 00DBA670 00B67540 00ED4FE0 034DF400
      034DF400 01758700 01CF4480 0128E6C0 01BC95A0 0362DF70 02D3B0C0 03BA68A0 00675CF0 0054F280 007E8BC0
      007E8BC0 0220E710 02984A40 03D46F60 003E58D0 022174B0 0331CEE0 00A92990 02FDBD50 018363F0 0142D200
      0142D200 01E3BB00 00893340 0266D570 0355BFC0 02FF6020 0180D030 0140B820 03E0E430 02109620 0118DD30
      0118DD30 0194B3A0 035EEA70 0178CFA0 01E25430 01137E20 039AC130 0257A1A0 017C7170 01C249C0 01236D20
      01236D20 03B2DBB0 026BB660 015E6D50 01F8ADF0 00827D80 00C34340 00A2E2E0 02F39390 018A5A50 034F7770
      034F7770 02E8CCC0 039CAAA0 0052FFF0 007B8000 00232000 00195800 0015F400 001F0E00 00108900 0018CD80
      0018CD80 0014AB40 001EFEE0 02118190 01194150 0395E1F0 012F8880 00DC2660 02B23550 01EB2FF0 011EB800
      011EB800 0191E400 01591600
     
