-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 22:32:41 2024 UTC
-- File 20240410_225418_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-10T22:54:21.000.000.000 to 2024-04-10T22:54:21.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240410_225418_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0383C3E0 00422210 02633310 0152AA90 03FBFFD0 00030010 02028010 0103C010 03822010 00433010 0262A810
      0262A810 0153FC10 03FA0210 00070310 02048290 028361E0 02E16880 0391DCC0 025932A0 0175ABF0 01CF7E00
      01CF7E00 0128C100 01BCA180 0162F140 01D389E0 033A4D10 0253B5C0 03BD3790 0063AC50 02527A70 037B4740
      037B4740 02C6E4E0 01A59690 03775DD0 00CCF330 00AA8AA0 02FFCFF0 01C01400 00900F00 00D80880 00B40CC0
      00B40CC0 00EE0AA0 02990FF0 03D58800 023F4C00 0320EA00 02B09F00 03E8D080 010E5C60 03C4B920 0026E5B0
      0026E5B0 00359760 022F5CD0 0138F2B0 01A48BE0 0376CE10 00CDA910 02AB7D90 01FEC350 0180D170 00A05CE0
      00A05CE0 02F07290 01884BD0 034C6E30 02EA5920 019F75B0 0150CF60 03F8A8D0 0004FCB0 000682E0 0302E1C0
      0302E1C0 0341C890 00E12CD0 0291BAB0 03D967E0 0035D410 022F3E10 0138A110 03A4F190 00768950 024DCDF0
      024DCDF0 01B59580 00B7AFA0 02EC7870 039A4440 02576660 017CD550 03C2BFF0 0223E000 03321000 02AB1800
      02AB1800 03FE9400 0100EF00
     
