-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 22:26:02 2024 UTC
-- File 20240410_173303_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-10T17:33:06.000.000.000 to 2024-04-10T17:33:06.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240410_173303_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E4C5E0 0196A710 035DF490 00F30ED0 028A89B0 03CFCD60 00282BD0 023C3E30 03222120 00B331B0 00EAA960
      00EAA960 029FFDD0 01D00330 013802A0 03A403F0 013B0100 00D340C0 00BAE0A0 02E790F0 03945880 025E74C0
      025E74C0 03714EA0 00C9E9F0 00AD1D00 00FB9380 00865A40 0262BBB0 03A9F330 027D0AA0 01438FF0 01E24800
      01E24800 01136C00 019ADA00 0157B700 01FC6C80 01025AC0 018377A0 01A16630 02B8EA90 01E49FD0 0316D030
      0316D030 029DB820 01D36430 013AD620 03A7BD30 027463A0 014E5270 01E97B40 028EE370 01E4C960 0316ADD0
      0316ADD0 009DFB30 00D306A0 02BA85F0 03E7C700 02142480 031E36C0 02912DA0 01D9BB70 009AB360 036BF560
      036BF560 00DE0FD0 02B10830 03E98C20 001D4A30 0013EF20 021A18B0 031714E0 009C9E90 02D2D1D0 00DDDC90
      00DDDC90 03599960 00F555D0 028FFF30 03C800A0 002C00F0 003A0080 002700C0 003480A0 022EC0F0 0339A080
      0339A080 0152B860 03FDF220 00030B30 00028EA0 0203C9F0 03022D00 02833B80 03C2A640 0223F560 01320FD0
      01320FD0 03AB0830 033F4610
     
