-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 22:15:26 2024 UTC
-- File 20240410_092243_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-10T09:22:46.000.000.000 to 2024-04-10T09:22:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240410_092243_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02E50D10 01978B90 035C4E50 00F26970 008B5DC0 00CEF320 02A98AB0 03FD4FE0 0201F400 01808700 00A06240
      00A06240 027829B0 03A21EB0 027311E0 014A9910 03EFD590 00183F50 021420F0 031E3080 029128C0 03D9BCA0
      03D9BCA0 003562F0 0017E9C0 020E0E90 010909D0 038D8D30 024B4BA0 016EEE70 01D99940 013555E0 03AFFF10
      03AFFF10 00780090 024400D0 00B30050 01754030 01CFE020 03281030 02BC1820 01E21430 01131E20 039A9130
      039A9130 0257D9A0 017C3570 01C22FC0 02919C10 02ECA900 039AFD80 02578340 037C42E0 00C26390 02A35250
      02A35250 01F2FB70 010B86C0 018E45A0 03496770 0176EA60 03E6CFA0 0015A870 001F7C40 0010C260 0218A350
      0218A350 0114F2F0 019E8B80 0151CE40 01F92960 0305BDD0 0043B190 033134A0 00A9AEF0 00FD7980 0083C540
      0083C540 00C227E0 02A33410 01F2AE10 030BF910 008E0590 02C90750 00D6C270 005ED1A0 0271B970 034965C0
      034965C0 02EDD720 019B3CB0 0156A2E0 03FDF390 00030A50 02028F70 0303C8C0 03411650 0070CEB0 0048A9E0
      0048A9E0 026CFD10 015A8390
     
