-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 21:50:51 2024 UTC
-- File 20240409_144546_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-09T14:45:49.000.000.000 to 2024-04-09T14:45:49.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240409_144546_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01BCB5F0 0162EF00 01D39880 013A54C0 02D3BF50 00DD3070 0059D420 013A9F10 03A7D090 007438D0 024E24B0
      024E24B0 036936E0 00DDAD90 02B37B50 01EAC6F0 011FA580 01907740 02AC2670 01FD1AA0 030397F0 02825C00
      02825C00 03C37200 0222CB00 0333AE80 02AA79C0 03FF4520 0000E7B0 00009460 03006F20 00402C50 02603A70
      02603A70 03502740 02F834E0 01842E90 034639D0 00E52530 0097B7A0 02DC6C70 03B25A40 0335BBB0 0357B330
      0357B330 02FC6AA0 01825FF0 01437000 01E2C800 0113AC00 019A7A00 01574700 01FCE480 010296C0 02C1EED0
      02C1EED0 00D08CD0 02B8CAB0 03E4AFE0 0016F810 021D8410 01134610 039AE510 00579790 027C5C50 01427270
      01427270 00F1A5A0 0144BBB0 01E6E660 03159550 009F5FF0 00D0F000 00B88800 00E4CC00 0096AA00 00DDFF00
      00DDFF00 00B30080 00754060 0327F020 00B40830 00EE0C20 02990A30 03D58F20 003F48B0 0020ECE0 02309A90
      02309A90 0128D7D0 03BCBC30 03317110 0254E4C0 037E96A0 00C1DDF0 00A13300 00F1AA80 00897FC0 00CDC020
      00CDC020 02AB2030 03FEB020
     
