-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 21:36:43 2024 UTC
-- File 20240409_031246_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-09T03:12:49.000.000.000 to 2024-04-09T03:12:49.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240409_031246_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01F57BB0 010FC660 03882550 004C37F0 006A2C00 005F3A00 0070A700 00247A40 021B23B0 038B5930 03277AD0
      03277AD0 00B4C7B0 00EEA460 0299F650 01D50D70 013F8BC0 01A04E20 03706930 02C85DA0 01AC7370 00BD2560
      00BD2560 0371DBE0 00C93610 02ADAD10 01FB7B90 0306C650 0085A570 00C777C0 00A4CC20 02F6AA30 038DFF20
      038DFF20 00258050 011BA030 01967020 035D4830 02F3EC20 018A1A30 014F1720 03E89CB0 021CD2E0 0112BB90
      0112BB90 039BE650 002B0AB0 021F47F0 0310E400 02989600 03D4DD00 023EB380 0321EA40 02B11F60 01E990D0
      01E990D0 031D58B0 0293F4E0 02ED0740 03CDC270 022B2340 033EB2E0 00A1EB90 02F11E50 01899170 014D59C0
      014D59C0 01EBF520 031E0FB0 02910860 02ECC620 00CD5290 02ABFBD0 01FE0630 01010520 038187B0 02414460
      02414460 0161E650 03D11570 02399FC0 03255020 005BFC10 033B0100 02A68180 03F5C140 020F21E0 0108B110
      0108B110 038CE990 004A9D50 026FD3F0 03583A00 02F42700 01C71A40 02924BB0 03DB6E60 0036D950 022DB5F0
      022DB5F0 033B6F00 02A6D880
     
