-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 20:41:08 2024 UTC
-- File 20240407_082144_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-07T08:21:47.000.000.000 to 2024-04-07T08:21:47.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240407_082144_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  02DAA920 01B7FDB0 016C0360 03DA02D0 003703B0 002C8260 023AC350 0127A2F0 01B47380 016E4A40 01D96F60
      01D96F60 039AEC60 022BCD20 013E2BB0 01A13E60 0371A150 00C971F0 00ADC900 00FB2D80 0086BB40 00C5E6E0
      00C5E6E0 02A71590 02FA4FA0 00C3B430 00A26E20 02F35930 038AF5A0 004F8F70 006848C0 005C6CA0 02725AF0
      02725AF0 034B7780 02EECC40 03CCD530 03155FD0 009FF030 00D00820 02B80C30 03E40A20 00160F30 001D08A0
      001D08A0 02138CF0 031A4A80 02976FC0 03EE6C10 020CAD00 030AFB80 028F8640 03C84560 002C67D0 023A5430
      023A5430 03277E20 00B4C130 00EEA1A0 0299F170 01EA84E0 038FE340 024812E0 016C1B90 03DA1650 00371D70
      00371D70 002C93C0 003ADA20 0227B730 03346CA0 00AE5AF0 007CBBC0 02217310 0131CA90 03A92FD0 007DB830
      007DB830 00436420 0262D630 0353BD20 00FA63B0 00875260 02C4FB50 00D34370 005D7160 0273C9D0 014A2D30
      014A2D30 01EF3BA0 0318A670 0294F540 03DE8FE0 0031C810 02292C10 013DBA10 03D1B380 011CB520 0392EFB0
      0392EFB0 025B9860 01765450
     
