-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 19:44:25 2024 UTC
-- File 20240405_133120_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-05T13:31:23.000.000.000 to 2024-04-05T13:31:23.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240405_133120_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01503B60 03F826D0 000435B0 020317B0 03029C60 0083D250 02C23B70 03A326C0 0272B5A0 014BEF70 01EE18C0
      01EE18C0 011914A0 03959EF0 012FA8C0 02DC3E50 01B22170 016B31C0 01DEA920 0331FDB0 02A90360 01FD82D0
      01FD82D0 030343B0 0282E260 01C39350 01912D70 00ACDDE0 02FAB310 0187EA90 03441FD0 00E61030 00951820
      00951820 02DF9430 03B05E20 00687130 005C49A0 013936B0 02D2D6F0 03BBBD80 02666340 035552E0 00FFFB90
      00FFFB90 02800650 01C00570 012007C0 01B00420 03680630 036E0290 026C81E0 015AC110 03F7A190 000C7150
      000C7150 020A49F0 030F6D00 0288DB80 03CCB640 022AED60 013F9BD0 01D02B10 039C1F40 025210E0 017B1890
      017B1890 03C694D0 0025DEB0 003731E0 022CA910 013AFD90 03A78350 007442F0 002731C0 021A5490 01177ED0
      01177ED0 039CC1B0 0252A160 017BF1D0 03C60930 02250DA0 01378B70 01AC4EC0 017A69A0 01E3AEB0 02893CF0
      02893CF0 03CDA280 022B73C0 033ECA20 00A1AF30 00F178A0 0289C4F0 03CD2680 022BB5C0 033E6F20 0050AC50
      0050AC50 013C7D30 01A243A0
     
