-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 18:58:50 2024 UTC
-- File 20240404_032521_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-04T03:25:24.000.000.000 to 2024-04-04T03:25:24.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240404_032521_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  017B66E0 03E36AC0 03096FD0 0046EC10 0332CD00 02ABAB80 03FE7E40 02014160 0101E1D0 03811130 024199A0
      024199A0 01615570 01D1FFC0 01390020 01D2C010 039DD000 02533800 037AA400 02C7F600 03A40D00 02760B80
      02760B80 034D0E40 02EB8960 019E4DD0 03516B30 037CEF50 00614C70 0051EA40 00791F60 024590D0 016758B0
      016758B0 01D4F4E0 033E8E90 00A1C9D0 02F12D30 0389BBA0 0026B330 021AF550 01178FF0 019C4800 01526C00
      01526C00 01FB5A00 0106F700 01858C80 01474AC0 01E4EFA0 03169870 014EEA20 01F4CF90 030EA850 0089FC70
      0089FC70 00CD0240 00AB8360 02FE42D0 018163B0 0141D260 03E13B50 0011A6F0 000CBAC0 020573D0 0107CA30
      0107CA30 01842F20 034638B0 02E524E0 0197B690 035C6DD0 00F25B30 008B76A0 02CECDF0 01D4D580 009F5FA0
      009F5FA0 02D0F070 03B88840 0264CC60 0156AA50 03FDFF70 020300C0 030280A0 0083C0F0 00C22080 00519860
      00519860 033CAA20 00A2FF30 00F380A0 028A40F0 03CF6080 0228D0C0 033CB8A0 00A2E4F0 00F39680 008A5DC0
      008A5DC0 0267B990 02AA32A0
     
