-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 18:58:26 2024 UTC
-- File 20240404_030826_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-04T03:08:29.000.000.000 to 2024-04-04T03:08:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240404_030826_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03E50A10 00178F10 030E2440 03449B30 03736B50 00656F70 002BEC60 023E1A50 01211770 01B19CC0 016952A0
      016952A0 03DDFBF0 02330600 032A8500 02BFC780 03E02440 03081B30 03460B50 00E50EF0 00978980 00DC4D40
      00DC4D40 00B26BE0 02EB5E10 019EF110 03518990 00F94D50 0285EBF0 01E38F00 00892440 00CDB660 02AB6D50
      02AB6D50 01FEDBF0 0101B600 01816D00 0141DB80 01E13640 0111AD60 03997BD0 002AE310 031FC940 02902DE0
      02902DE0 01D83B10 03342690 00AE35D0 02F92F30 0385B8A0 004764F0 0064D680 0056BDC0 023EF190 0290C4A0
      0290C4A0 01D8A6F0 0134F580 01AE8F40 0179C8E0 03C52C90 0027BAD0 023467B0 032E5460 00B97E50 0172E0B0
      0172E0B0 02E5C870 03972C40 025CBA60 0172E750 03CB94F0 022E5E80 033971C0 02A5C920 01F72DB0 010CBB60
      010CBB60 03C57360 0213E560 011A17D0 03971C30 025C9220 0172DB30 01CBB6A0 032E6DF0 02B95B00 03E5F680
      03E5F680 02170DC0 038E4590 0224B3A0 0136EA70 01AD9F40 017B50E0 03C6F890 002584D0 023746B0 032CE5E0
      032CE5E0 00BA9710 02E7DC90
     
