-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 18:58:01 2024 UTC
-- File 20240404_025131_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-04T02:51:34.000.000.000 to 2024-04-04T02:51:34.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240404_025131_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  0017F670 001C0D40 00120BE0 021B0E10 01168910 039DCD90 00532B50 027ABEF0 0347E180 02E41140 039619E0
      039619E0 005D1510 02739F90 014A5050 03EF7870 0218C440 0314A660 024F7AA0 00B463F0 00EE5200 00997B00
      00997B00 00D5C680 00BF25C0 00E0B720 0290ECB0 03D89AE0 0034D790 022EBC50 009CF130 026944D0 015DE6B0
      015DE6B0 01F315E0 030A9F10 008FD090 02C838D0 01AC24B0 017A36E0 03C72D90 0024BB50 011B7370 00CB6560
      00CB6560 02AED7D0 01F9BC30 01056220 0387D330 02443AA0 016627F0 01D53400 013FAE00 01A07900 00B822C0
      00B822C0 027219D0 014B1530 01EE9FA0 0319D070 02953840 03DFA460 00307650 02284D70 033C6BC0 02A25E20
      02A25E20 00F9B890 0342B260 00E3EB50 02921EF0 03DB1180 02369940 032DD5E0 00BB3F10 02E6A090 0195F0D0
      0195F0D0 035F08B0 03784670 016232A0 03D32BF0 023ABE00 0327E100 02B41180 03EE1940 021915E0 01159F10
      01159F10 039F5090 0050F8D0 013C4250 01D131B0 0139A960 03A57DD0 0077C330 004C22A0 026A33F0 035F2A00
      035F2A00 02F0BF00 0388E080
     
