-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 18:55:38 2024 UTC
-- File 20240404_003626_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-04T00:36:29.000.000.000 to 2024-04-04T00:36:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240404_003626_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  036F3A80 02D8A7C0 03B4F420 006E8E30 022CE490 029D4B60 02E9F760 019D0CD0 03538AB0 02FA4FE0 01876810
      01876810 0344DC10 00E6B210 0295EB10 01DF1E90 033091D0 00546C90 033F2D60 00A0BBD0 02F0E630 03889520
      03889520 004CDFB0 006AB060 025FE850 01701C70 01C81240 012C1B60 03DD0B60 0219C760 011524D0 039FB6B0
      039FB6B0 02506DE0 01785B10 03C47690 00264DD0 02356B30 032FDEA0 00B831F0 00721480 00258F60 023748D0
      023748D0 012CECB0 01BA9AE0 0367D790 00D43C50 02BE2270 03E13340 0211AAE0 01197F90 03CAE020 0017C810
      0017C810 021C2C10 01123A10 039B2710 0056B490 027DEED0 014319B0 01E29560 0313DFD0 009A3030 026B9410
      026B9410 02AF2F00 03F8B880 0204E4C0 030696A0 0085DDF0 00C73300 00A4AA80 00F6FFC0 008D8020 02CB4030
      02CB4030 03D77010 021E6400 03115600 0299FD00 03D50380 023F8240 03204360 00B062D0 02E853B0 039C7A60
      039C7A60 00524750 013DB270 00D1B5A0 02B96F70 03E5D8C0 021734A0 011CAEF0 0192F980 015B8540 01F647E0
      01F647E0 030D6410 008BD610
     
