-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 18:38:05 2024 UTC
-- File 20240403_112141_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-03T11:21:44.000.000.000 to 2024-04-03T11:21:44.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240403_112141_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03D48840 023ECC60 0290D520 00EC5FD0 029A7030 03D74820 003CEC30 00229A20 0233D730 032A3CA0 00BF22F0
      00BF22F0 00E0B380 0090EA40 026C4FB0 03AD3430 027BAE20 01467930 01E545A0 0317E770 029C14C0 03D21EA0
      03D21EA0 003B11F0 00269900 0035D580 00179FA0 010E2830 01893C20 034DA230 02EB7320 019ECAB0 0151AFE0
      0151AFE0 03F97810 0005C410 02072610 0104B510 03C377C0 03116610 0099D510 02D53F90 01BFA050 03607070
      03607070 02D04840 03B86C60 00645A50 02567770 037D4CC0 0361F550 006887F0 005CC400 0072A600 004BF500
      004BF500 006E0F80 00590840 00758C60 024F4A50 0168EF70 01DC98C0 02996A50 00EAEFB0 009F9860 02D05450
      02D05450 01B87E70 01644140 01D661E0 033D5110 00A3F990 02F20550 018B07F0 00A74200 007A7180 00474940
      00474940 0064EDE0 02569B10 017DD690 03C33DD0 0022A330 0033F2A0 022A0BF0 033F0E00 01504480 00FC3360
      00FC3360 02822AD0 01C33FB0 0122A060 03B3F050 006A0870 005F0C40 00708A60 0248CF50 016CA8F0 00ED7E40
      00ED7E40 024DE0B0 036B10E0
     
