-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 18:34:37 2024 UTC
-- File 20240403_084926_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-03T08:49:29.000.000.000 to 2024-04-03T08:49:29.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240403_084926_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01D2D530 029DDFD0 01D33030 013AA820 03A7FC30 02740220 014E0330 01E902A0 031D83F0 02934200 03DAE300
      03DAE300 011BC940 02CB16F0 03AE9D80 0279D340 03453AE0 00E7A790 02947450 01DE4E70 01316940 01A9DDE0
      01A9DDE0 037D3310 0261D540 03A89FF0 027CD000 0342B800 02E3E400 03921600 025B1D00 03769380 02CDDA40
      02CDDA40 03AB3760 007EACD0 0120FD50 01D841F0 01346100 01AE5180 01797940 01C5C5E0 03272710 00B4B490
      00B4B490 02EEEED0 019999B0 01555560 03FFFFE0 02000000 03000000 02800000 03C00000 02200000 03300000
      03300000 02A80000 03FC0000 02020000 03030000 01414000 00F0F000 00888800 00CCCC00 00AAAA00 00FFFF00
      00FFFF00 00800080 00C000C0 00A000A0 02F000F0 03880080 01260060 03DA8020 0037C030 002C2020 023A3030
      023A3030 03272820 00B4BC30 00EEE220 02999330 03D55AA0 003FF7F0 00100600 000C0280 000A03C0 000F0220
      000F0220 02088330 030CC2A0 008AA3F0 00CFF200 00A80B00 00FC0E80 008209C0 02618690 02A8A2E0 01FCF390
      01FCF390 03028A50 0083CF70
     
