-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 18:15:45 2024 UTC
-- File 20240402_175213_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-02T17:52:16.000.000.000 to 2024-04-02T17:52:16.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240402_175213_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03BA6CF0 0133AD40 02D53DF0 01DFD180 00981CA0 016A0970 01DF0DC0 01308B20 03A8CEB0 027CA9E0 0142FD10
      0142FD10 03E38390 00124250 021B6370 0316D2C0 034EDDD0 0074D990 024EB550 0169EFF0 01DD1800 01339400
      01339400 01AA5E00 017F7100 01C0C980 0120AD40 01B0FBE0 03B44300 01373140 01ACA9E0 037AFD10 00C78390
      00C78390 02A44250 01F66370 010D52C0 018BFBA0 034E0670 02E90540 03CEC3F0 0114D100 019EB980 0151E540
      0151E540 01F917E0 03059C10 00875210 02C4FB10 01A68690 0375C5D0 00CF2730 02545A50 00BF3BB0 00E0A660
      00E0A660 0290F550 01D88FF0 0134C800 01AEAC00 0179FA00 01C50700 01278480 01B446C0 02B732D0 00F655D0
      00F655D0 028D7F30 03CBC0A0 002E20F0 00393080 0025A8C0 00377CA0 022CC2F0 033AA380 02A7F240 03FA05B0
      03FA05B0 030383B0 02824260 01C36350 0322D2F0 02B3BB80 03EA6640 021F5560 0110FFD0 03988030 0254C020
      0254C020 00BF5010 03707C00 02C84200 03AC6300 027A5280 03477BC0 02E4C620 0196A530 015DF7A0 03F30C70
      03F30C70 020A8A40 0387E7B0
     
