-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 17:59:30 2024 UTC
-- File 20240402_051121_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-02T05:11:24.000.000.000 to 2024-04-02T05:11:24.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240402_051121_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  01F60AE0 030D0F90 008B8850 02CE4C70 03A96A40 027DDF60 014330D0 01F15450 0184FF30 02A34050 00F97030
      00F97030 0242E410 01639610 03D25D10 003B7390 0226CA50 0135AF70 01AF78C0 0178C4A0 03C4A6F0 0226F580
      0226F580 019AC7A0 01ABD230 017E3B20 03C126B0 0221B5E0 01316F10 03A9D890 007D34D0 0243AEB0 036279E0
      036279E0 00D34510 035D73C0 0379E510 00C51790 02A79C50 01F45270 010E7B40 018946E0 034DE590 00EB1750
      00EB1750 029E9CF0 03D1D280 011C9DE0 03C96980 022DDD40 033B33E0 00A6AA10 02F5FF10 018F0090 034880D0
      034880D0 00ECC0B0 009AA0E0 02D7F090 02DE0460 02D88320 01B4C2B0 016EA3E0 03D9F210 00350B10 022F8E90
      022F8E90 013849D0 03A46D30 02765BA0 014D7670 00F5E6A0 01478AF0 01E44F80 01166840 019D5C60 0353F250
      0353F250 00FA0B70 00870EC0 00C489A0 02A6CD70 03F5ABC0 0307BF10 02423040 03632860 00D2BC50 02BBE270
      02BBE270 03E61340 02151AE0 011F9790 03905C50 00587270 00744B40 02273770 019A5660 03577D50 00FCC3F0
      00FCC3F0 0082A200 00C3F300
     
