-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 17:49:29 2024 UTC
-- File 20240401_213443_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-01T21:34:46.000.000.000 to 2024-04-01T21:34:46.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240401_213443_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  03B05720 00687CB0 005C42E0 02726390 014B5250 01F77DB0 010CC360 038AA2D0 004FF3B0 00680A60 025C0F50
      025C0F50 017208F0 01CB0C80 012E8AC0 01B9CFA0 01B29430 02B5EF10 01EF1890 031894D0 0094DEB0 00DEB1E0
      00DEB1E0 02B1E910 01E91D90 031D9350 00935AF0 00DAF780 005BC620 013B1290 03A69BD0 0075D630 004F3D20
      004F3D20 0268A3B0 035CF260 00F28B50 028BCEF0 03CE2980 02293D40 039ED1F0 0128DC80 01BCB2C0 0162EBA0
      0162EBA0 03D39E70 023A5140 032779E0 00B4C510 02EEA790 0199F450 03550E70 017FC4A0 01E01370 01101AC0
      01101AC0 019817A0 03541C70 02FE1240 03811B60 004196D0 02615DB0 0351F360 00F90AD0 0142C7D0 01F1D210
      01F1D210 03093B10 008DA690 02CB75D0 01AECF30 0179A8A0 03C57CF0 0227C280 033423C0 02AE3220 00FC9590
      00FC9590 03416FA0 00E1D870 00913440 00D9AE60 02B57950 01EFC5F0 01182700 01943480 015E2EC0 01F139A0
      01F139A0 0184D2B0 02A35DF0 03F2F300 020B8A80 030E4FC0 02896820 01CDDC30 012B3220 03BEAB30 0261FEA0
      0261FEA0 015101F0 00FCC080
     
