-- OK --
-----------------> BLESK ver.2021-02-27 run on Fri Apr 19 17:41:53 2024 UTC
-- File 20240401_155517_1224.dat, 1  packets found.
APID:
      1224 (INIT) in 1 packets (all packets)
Mode:
      1 (EBEW-SRSL) in 1 packets (all packets)
Total number of packets: 
      1 in 1 packets (all packets)
Packet No from 1 to 1
Hz and MHz counters from 0.000000 to 0.000000
-each separately from 0s to 0s and from 0us to 0us.
MIU packet time from 2024-04-01T15:55:20.000.000.000 to 2024-04-01T15:55:20.000.000.000
MIU orbit number: 
      60000 in 1 packets (all packets)
MIU orbit information / directon: 
      0 (DOWN) in 1 packets (all packets)
MIU orbit information / number of events: 
      0 in 1 packets (all packets)
Waveform overflows in 306us: 
      0 (none) in 1 packets (all packets)
Instrument anomalies: 
      0 (OK) in 1 packets (all packets)
FPGA configuration version: 
      211 in 1 packets (all packets)
10 MHz counter at the last 1Hz pulse from 0.0000000 to 0.0000000
Temperature FPGA: 
      00 -> 55.0 degC in 1 packets (all packets)
Temperature XO: 
      00 -> -273.1 degC in 1 packets (all packets)
Temperature ant 3: 
      00 -> 115.9 degC in 1 packets (all packets)
Temperature ant 4: 
      00 -> 115.9 degC in 1 packets (all packets)
Number of external events: 
      0 in 1 packets (all packets)
Number of generated alerts: 
      0 in 1 packets (all packets)
Survey memory error: 
      0 in 1 packets (all packets)
Event memory error: 
      0 in 1 packets (all packets)
Configuration error: 
      0 in 1 packets (all packets)
SDRAM CRC error: 
      0 in 1 packets (all packets)
Radio gain: 
      0 in 1 packets (all packets)
Radio bandwidth: 
      0 in 1 packets (all packets)
Digital gain: 
      0 in 1 packets (all packets)
Analog gain: 
      12 in 1 packets (all packets)

Configuration from the INI packet written to 20240401_155517_1224.asc

Configuration check: mode validity (other than 0, 14 or 15): OK
Configuration check: completeness of CONFHFA (19 bytes)    : OK
Configuration check: completeness of HFPE/RW (19+120 bytes): OK
Configuration check: number of received CONFHFA bytes      : 19
Configuration check: number of HFPE/RW intervals (max. 20) : 20

Stack1 memory test: writing 0: OK    writing 1: OK
Stack2 memory test: writing 0: OK    writing 1: OK

SDRAM memory test: OK
Addr  004BBD70 006E63C0 022CA910 029D7EC0 03E9E0D0 000E8850 0209CC70 030D2A40 028BBF60 01CE60D0 032950B0
      032950B0 02BDF8E0 01E30490 031286D0 009BC5B0 026B13B0 03AF4D30 0278EBA0 01449E70 01E6D140 0115B9E0
      0115B9E0 039F6510 0050D790 0278BC50 0144E270 01E69340 028AED70 01E7CDE0 03142B10 009E3E90 02D121D0
      02D121D0 01B9B130 016569A0 03D7DD70 023C33C0 03222A20 00B33F30 02755050 00A7FC30 00F40220 028E0330
      028E0330 03C902A0 002D83F0 003B4200 0026E300 00359280 002F5BC0 0038F620 01124690 03CDB2E0 002B6B90
      002B6B90 023EDE50 0121B170 01B169C0 0169DD20 03DD33B0 0233AA60 012A7F50 03BF40F0 01307040 02D42430
      02D42430 03BE3620 00612D30 0051BBA0 02796670 0345D540 02E73FE0 0194A010 035EF010 00F18810 0344A600
      0344A600 01737A80 01CAC7C0 012FA420 03B87630 02644D20 01566BB0 01FD5E60 0303F150 008209F0 00C30D00
      00C30D00 005145C0 023CF390 01228A50 03B3CF70 026A28C0 035F3CA0 00F0A2F0 0088F380 00CC8A40 00AACF60
      00AACF60 02FFA8D0 00C03E50
     
